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sa57254-xx cmos switching regulator (pwm controlled) product data supersedes data of 2001 aug 01 2003 nov 11 integrated circuits
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2 2003 nov 11 general description the sa57254-xx is a fully integrated dc/dc converter circuit. efficient, compact power conversion is achieved with a pulse width modulation (pwm) controlled switching regulator circuit designed using cmos processing. low ripple and high efficiency of typically 83% are achieved through pwm control. the regulator has a high precision output with 2.4% accuracy. few external components are required. the sa57254-xx has a built-in soft-start circuit which reduces inrush current and voltage overshoot during start-up. a low resistance cmos power fet, which has low leakage current and low parasitic capacitance, is on-chip. features ? operates from 0.7 to 9 v dc ? ultra low operating supply currentetypically 17 m a ? built-in power fet ? high efficiencyetypically 83% ? high precision outputetypically 2.4% ? operating temperature range of 40 to +85 c ? available output voltages: 2.0, 2.5, 2.8, 3.0, 3.3, 3.6, 5.0 v dc ? available in a 5-lead small outline surface mount package (sop003) applications ? mobile and portable phones ? instrumentation and industrial products ? other portable, battery-operated equipment simplified system diagram sl01501 1 v ref 5 4 v out v batt sa57254-xx gnd sw fb pwm control soft start 2 r r sa57254-xx as a boost (step-up) converter. v dd figure 1. simplified system diagram.
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 3 ordering information type number package temperature type number name description version range sa57254- xx gw sot23-5, sot25, so5 plastic small outline package; 5 leads; body width 1.6 mm sop003 40 to +85 c note: the device has seven voltage output options, indicated by the xx on the type number. xx voltage (typical) 20 2.0 v 25 2.5 v 28 2.8 v 30 3.0 v 33 3.3 v 36 3.6 v 50 5.0 v part number marking each device is marked with a four letter code. the first three letters designate the product. the fourth letter, represented by `x', is a date tracking code. part number marking sa57254-20gw a e k x SA57254-25GW a e l x sa57254-28gw a e m x sa57254-30gw a e n x sa57254-33gw a e p x sa57254-36gw a e r x sa57254-50gw a e s x pin configuration sl01502 1 2 34 5sw gnd n/c v dd fb sa57254-xx figure 2. pin configuration. pin description pin symbol description 1 fb feedback from the output voltage to the pwm control. 2 v dd voltage input to regulator. 3 n/c no connection. 4 gnd ground. 5 sw switching output to inductor. maximum ratings symbol parameter min. max. unit v in(max) power supply voltage 0.3 11 v v fb fb pin voltage 0.3 11 v v sw sw pin voltage 0.3 11 v i sw sw pin current 300 ma t oper operating temperature 40 +85 c t stg storage temperature 40 +125 c p d power dissipation 150 mw
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 4 electrical characteristics t amb = 25 c, unless otherwise specified. symbol parameter conditions part # min. typ. max. unit v in input voltage 9.0 v v st1 operating start voltage i out = 1.0 ma 0.9 v v st2 oscillator start voltage 0.8 v v hld operation hold voltage i out = 1.0 ma 0.7 v i ss1 consumption current 1 v out = output voltage 0.95 -20 11.6 19.4 m a -25 14.3 23.9 m a -28 16.1 26.8 m a -30 17.2 28.7 m a -33 19.1 31.8 m a -36 22.4 37.3 m a -50 38.5 64.1 m a i ss2 consumption current 2 v out = output voltage + 0.5 v -20 3.1 6.2 m a -25 3.2 6.3 m a -28 3.2 6.4 m a -30 3.2 6.4 m a -33 3.3 6.5 m a -36 3.3 6.5 m a -50 3.5 6.9 m a r ds(on) internal switch-on resistance v sw = 0.4 v -20 5.6 8.9 w () -25 4.1 6.5 w -28 4.1 6.5 w -30 3.2 5.1 w -33 3.2 5.1 w -36 3.2 5.1 w -50 2.2 3.5 w i swo switching transistor leak current v out = v sw = 9 v 1.0 m a d v out2 load ripple voltage i out = 10 ma i out (following) 1.25 30 60 mv d v out / d t amb output voltage temperature coefficient 40 c t amb +85 c 50 ppm/ c f osc oscillator frequency v out = output voltage 0.95 42.5 50 57.5 khz maxduty maximum duty ratio v out = output voltage 0.95 75 83 90 % t ss soft start time i out = 1.0 ma 3.0 6.0 12 ms e ffi efficiency -20 75 % -25 79 % -28 79 % -30 83 % -33 83 % -36 83 % -50 87 %
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 5 typical performance curves sl01456 t amb ? c) 50 40 30 20 10 0 40 20 0 20 40 60 80 100 v out = output voltage 0.95 i ss1 ( m a) figure 3. supply current 1 versus temperature. sl01457 t amb ? c) 5 4 3 2 1 0 40 20 0 20 40 60 80 100 v out = output voltage + 0.5 v i ss2 ( m a) figure 4. supply current 2 versus temperature. sl01458 t amb ? c) 55 50 45 40 35 30 40 20 0 20 40 60 80 100 v out = output voltage 0.95 70 65 60 f osc (khz) figure 5. oscillator frequency versus temperature. sl01459 v out (v) 50 40 30 20 10 0 02 4 6 810 t amb = 25 c i ss1, 2 ( m a) figure 6. supply current 1, 2 versus v out . sl01462 v out (v) 250 200 150 100 50 0 01 2 3 4 5 t amb = 25 c v cont = 0.4 v i sw (ma) figure 7. typical switch current versus v out . sl01471 v out (v) 50 40 30 01 2 345 70 60 t amb = 25 c f osc (khz) figure 8. oscillator frequency versus v out .
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 6 v out output voltage (20 mv/div) v sw sw voltage (1 v/div) t (10 m s/div) sl01472 v in = 1.8 v figure 9. ripple voltage at i out = 200 m a. v out output voltage (20 mv/div) v sw sw voltage (1 v/div) t (10 m s/div) sl01473 v in = 1.8 v figure 10. ripple voltage at i out = 10 ma. v out output voltage (20 mv/div) v sw sw voltage (1 v/div) t (10 m s/div) sl01474 v in = 1.8 v figure 11. ripple voltage at i out = 60 ma. v in input voltage (1 v/div) v out output voltage (1 v/div) t (1 ms/div) sl01475 i out = 60 ma figure 12. start-up characteristic v in : 0 v 1.8 v. i out load current (20 ma/div) v out output voltage (50 mv/div) t (200 m s/div) sl01477 i out : 100 m a 50 ma; v in = 1.8 v figure 13. output load regulation, increasing current.
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 7 i out load current (20 ma/div) v out output voltage (50 mv/div) t (5 ms/div) sl01478 i out : 50 ma 100 m a; v in = 1.8 v figure 14. output load regulation, decreasing current. v in input voltage (500 mv/div) v out output voltage (50 mv/div) t (100 m s/div) sl01479 v in : 1.8 v 2.4 v; i out = 50 ma figure 15. input line regulation, increasing voltage. v in input voltage (500 mv/div) v out output voltage (50 mv/div) t (200 m s/div) sl01480 v in : 2.4 v 1.8 v; i out = 50 ma figure 16. input line regulation, decreasing voltage. sl01481 i out , output current (ma) 012345678910 v in , input voltage (v) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v st1 v do figure 17. output current versus starting voltage. sl01482 i out , output current (ma) 012345678910 v in , input voltage (v) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v st1 v do figure 18. input voltage versus output current. sl01483 v in , input voltage (v) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 i in , input current ( a) 0 50 100 150 200 250 300 350 400 450 500 v out = 2 v v out = 3 v m v out = 5 v figure 19. input voltage versus supply current.
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 8 sl01484 i out , output current (ma) 0.01 0.1 1 10 100 1000 4.90 4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10 v out , output voltage (v) v in = 0.9 v v in = 1.8 v v in = 3.0 v v in = 4.0 v figure 20. output current versus voltage (100 m h inductor). sl01485 i out , output current (ma) 0.01 0.1 1 10 100 1000 50 55 60 65 70 75 80 85 90 95 100 e ffi , efficiency (%) v in = 0.9 v v in = 1.8 v v in = 3.0 v v in = 4.0 v figure 21. output current versus efficiency (100 m h inductor). sl01486 i out , output current (ma) 0.01 0.1 1 10 100 1000 0 10 20 30 40 50 60 70 80 90 100 v r , ripple voltage (mv) v in = 0.9 v v in = 1.8 v v in = 2.4 v figure 22. output current versus ripple voltage (l 0 = 100 m h; c out = 33 m f).
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 9 technical discussion general discussion the sa57254-xx is a highly integrated boost-mode switching power supply integrated circuit. each device is set to provide a fixed output voltage by having a fully compensated internal voltage feedback loop. the sa57254-xx operates at a fixed frequency of 50 khz and can operate from a single alkaline cell (0.9 v) or up to 9 v. the sa57254-xx has an internal common-source power switching mosfet which provides the pwm signal to the inductor. the voltage error amplifier for maintaining a fixed output voltage, the oscillator and a pwm generator are all in the package. sl01503 1 v ref 5 4 sa57254-xx gnd sw fb pwm control soft start r r v dd 2 figure 23. functional diagram.
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 10 application information the sa57254-xx can be used for a simple boost (step-up) converter or the less commonly used flyback converter (isolated boost). the major operating restriction of the simple boost converter is that its output voltage must always be above the highest expected value of the input voltage. the flyback converter circuit requires more parts, but the output voltage is not restricted by the input voltage. boost converter fundamentals the boost or step-up converter is a non-dielectrically isolated switching power supply topology (arrangement of power parts). that is, the input power source is directly connected to the output load (ground and signals). a typical boost converter, with an optional passive snubber, can be seen in figure 24. to understand the boost converter's operation, examine its three periods of operation. these periods are: the power switch on-time (period 1); the inductor discharge period (period 2); and the inductor empty state (period 3). these periods and their associated currents can be seen in figure 25. sl01504 d v in c in gnd sa57254-xx sw v dd passive snubber (optional) v out c out fb l 0 figure 24. boost converter. sl01464 switch voltage (v) inductor current (a) 0 v in (v in v out ) i peak i sw r ds(on) core empty, parasitic circulating energy +v out energy being transferred to output spike energy being stored in inductor +v in l 0 l 0 period 1 period 2 period 3 figure 25. boost converter waveforms (discontinuous mode).
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 11 period 1: power switch on-time during this period, a simple circuit loop is formed when the power switch is on. the input voltage source is connected directly across the boost inductor (l 0 ). a current ramp is exhibited whose slope is described by: il ( on ) v in l 0 eqn. (1) energy is then stored within the core material of the inductor and is described by: e sto 0.5 l 0 i peak 2 eqn. (2) this current ramp continues until the controller turns off the power switch. period 2: inductor discharge period the instant the power switch turns off, the current flowing through the inductor forces the voltage at its output node (switched node) to rise quickly above the input voltage (spike). this voltage is then clamped when it exceeds the device's output voltage and the output rectifier becomes forward biased. the inductor empties its stored energy in the form of a linearly decreasing current ramp whose slope is dictated by: i l ( off ) v in v out l 0 eqn. (3) the stored energy is transferred to the output capacitor. this output current continues until the magnetic core is completely emptied of its stored energy or the power switch turns back on. period 3: inductor empty state d iscontinuous mode e this period as displayed in figure 25 occurs in the discontinuousmode of operation of a boost converter. it is identified by a period of aringingo following the output period (period 2). the inductor has been completely emptied of its stored energy and the switched node returns to the level of the input voltage. ringing is seen at this node because a resonant circuit is formed by the inductance of l 0 and any parasitic inductances and capacitances connected to that node. this ringing has very little energy and can easily be eliminated by a small passive snubber. c ontinuous mode e if the inductor is not completely emptied of its stored energy before the power switch turns on again, the converter is operating in the continuous mode. a small amount of residual flux (energy) remains in the inductor core and the current waveform jumps to an initial value when the power switch is again turned-on. this mode offers some advantages over the discontinuous-mode, because the peak current seen by the power switch is lower. in low voltage applications, the inductor can store more energy with lower peak currents. the continuous mode waveforms can be seen in figure 26. switch voltage (v) inductor current (a) 0 spike +v out +v in v in (v in v out ) i peak residual flux energy being transferred to output energy being stored in inductor sl01465 l 0 l 0 figure 26. continuous mode waveforms.
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 12 determining the value of the boost inductor the precise value of the boost inductor is not critical to the operation of the sa57254-xx. the value of the boost inductor should be calculated to provide continuous-mode operation over most of its operating range. the converter may enter the discontinuous-mode when the output load current falls to less than about 20 percent of the full-load current. at low input voltages, the time required to store the needed energy lengthens, but the time needed to empty the inductor's core of its energy shrinks. conversely, at high input voltages, the time needed to store the energy shrinks while the time needed to empty the core increases. see equations (1) and (3). at the extremes of these conditions, the converter will fall out of regulation, that is the output voltage will begin to fall, because the time needed for either storing or emptying the stored inductor energy is too short to support the output load current. to determine the nominal value of the inductance, use equation (4). l 0 v in ( min ) t on i peak eqn. (4) where: v in(min) is the lowest expected input operating voltage (v). t on is about 10 m s or one-half the switching period (s). i peak is the maximum peak current for the sa57254-xx (0.3 a). this is an estimated inductor value and you can select an inductance value slightly higher or lower with little effect on the converter's operation. if the design falls out of regulation within the desired operating range, reduce the inductance value, but by no more than 30 percent. determining the minimum value of the capacitors the input and output capacitors experience the current waveforms seen in figures 25 and 26. the peak currents can be typically between 3 to 6 times the average currents flowing into the input and from the output. this makes the choice of capacitor an issue of how much ripple voltage can be tolerated on the capacitor's terminals and how much heating the capacitor can tolerate. at the power levels produced by the sa57254-xx heating is not a major issue. the equivalent series resistance (esr) of the capacitor, the resistance that appears between its terminals, and the actual capacitance causes heat to be generated within the case whenever there is current entering or exiting the capacitor. esr also adds to the apparent voltage drop across the capacitor. the heat that is generated can be approximated by equation (5). p d ( in watts ) (1.8 i av ) 2 ( r esr ) eqn. (5) esr's effect on the capacitor voltage is given by equation (6). v c i peak ( r esr ) eqn. (6) (expressed as v pp ) a ceramic capacitor would typically be used in this application if the required value is less than 1 10 m f, or a tantalum capacitor for required values of 10 m f and above. lower cost aluminum electrolytic capacitors can be used, but you should confirm that the higher esrs typically exhibited by these capacitors does not cause a problem. the minimum value of the output capacitor can be estimated by equation (7). c out ( i out ( max ) )( t off ) v ripple ( p p ) eqn. (7) where: i out is the average value of the output load current (a). t off is the nominal offtime of the power switch (sec) [ @ 10 m s]. v ripple is the desired amount of ripple voltage (v pp ). finding the value of the input capacitor is done by equation (8). c in ( i peak )( t on ) v drop eqn. (8) where: i peak is the expected maximum peak current of the switch (a). t on is the on-time of the switch (sec) [ @ 10 m s]. v drop is the desired amount of voltage drop across the capacitor (v pp ). these calculations should produce a good estimate of the needed values of the input and output capacitors to yield the desired ripple voltages. selecting the output rectifier the output rectifier (d) is critical to the efficiency and low-noise operation of the boost converter. the majority of the loss within the supply will be caused by the output rectifier. three parameters are important in the rectifier's operation within a boost-mode supply. these are defined below. forward voltage drop (v f )e this is the voltage across the rectifier when a forward current is flowing through the rectifier. a p-n ultra-fast diode exhibits a 0.7 1.4 volt drop, and this drop is relatively fixed over the range of forward currents. a schottky diode exhibits a 0.3 0.6 volt drop and appears more resistive during the forward conduction periods. that is, its forward voltage drop increases with increasing currents. you can gain an advantage by purposely over-rating the current rating of a schottky rectifier to minimize this increasing voltage drop. reverse recovery time (t rr )e this is an issue when the boost supply is operating in the continuous-mode. t rr is the amount of time required for the rectifier to assume an open circuit when a forward current is flowing and a reverse voltage is then placed across its terminals. p-n ultra-fast rectifiers typically have a 2540 ns reverse recovery time. schottky rectifiers have a very short or no reverse recovery time. forward recovery time (t fr )e this is the amount of time before a rectifier begins conducting forward current after a forward voltage is placed across its terminals. this parameter is not always well specified by the rectifier manufacturers. it causes a spike to appear when the power switch turns off. this particular point in its operation causes the most radiated noise. several rectifiers may have to be evaluated for the prototype. after the final output rectifier selection is made, if the spike is still causing a problem a small passive snubber can be placed across the rectifier. for this boost application, the best choice of output rectifier is a low forward drop, 0.5 1 ampere, 20 volt schottky rectifier such as the philips part number bat120a.
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 13 flyback converter the sa57254-xx can also be used to create a flyback converter, also known as an isolated boost converter. the advantage of a flyback converter is that the input voltage can go higher or lower than the output voltage without affecting the operation of the converter. the only restrictions are the peak current flowing into the switch pin (sw) and the breakdown voltage of the sw and feedback (v fb ) pins. one transformer can accommodate a variety of output voltages in different applications, because the circuit will change the on and offtimes to provide the desired output voltage. the output voltage of the flyback can be changed by using a sa57254-xx with the desired output voltage, with no other changes to the circuit. selecting the components it is best to operate the transformer in the continuous-mode where the highest expected peak primary current is below the maximum current rating of the sa57254-xx switch. because the sa57254-xx is a peak current-limitied ic, begin with a peak current equal to or less than the maximum current rating of the part (0.3 a). a reasonable value of the primary inductance can be found in equation (9). l pri 5 v in ( min ) t on i peak eqn. (9) where: i peak is 0.3 a or less. t on is the maximum expected on-time of the switch ( 10 m s). v in(min) is the lowest expected input voltage (v). then select an off-the-shelf transformer such as the coiltronics ctx1001p, a 1:1 turns ratio transformer that has a primary inductance of 100 m h. it does not reach saturation until the primary current reaches 440 ma, which is above the expected peak current of the flyback converter. the 1:1 turns ratio should work for output voltages from 0.8 to 2 times the highest input voltage, and produce the output voltage set by the sa57254-xx. the only other restriction is that the input voltage plus the output voltage must be less than the breakdown voltage of the sa57254-xx (9 v). use equation (8) to determine the minimum value for the input capacitor. a 0.1 v drop is desired across this capacitor. c in (0.3 a )(10 s ) 0.1 v 30 f a 47 m f at 6 v tantalum capacitor would be suitable. for the design example, the output voltage will be +3.3 v with a maximum output current of 50 ma. the input voltage can vary between +1.8 v and 4.0 v. the design can be seen in figure 27, and the expected waveforms can be seen in figure 28. sl01505 sa57254-33 v batt 47 m f @ 10 v gnd fb sw 47 m f @ 10 v v out 3.3 v @ 0.1 a coiltronics ctx100-1p figure 27. flyback converter circuit. sl01468 diode current (a) switch current (a) switch voltage (v) secondary voltage (v) v in + v out (1:1 transformer) +v out ground (0 v) v in i sw(peak) i diode(peak) v in i peak = i diode (1:1 transformer) v in figure 28. flyback converter waveforms.
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 14 designing a passive snubber if the switching power supply is generating too much radio frequency interference (rfi) a passive snubber can be added. a passive snubber is a series resistor and capacitor placed across any component that exhibits a resonant aringingo. this series r-l-c loop creates a lossy or damped tank circuit that dissipates the ringing energy. the design is critical, because it introduces another loss within the converter. designing a snubber is an empirical process, mainly because it involves undefined parasitic capacitances and inductances contributed by the pcb layout, leakage inductance, and device capacitances. the snubber should be placed across the major source of the spike or ringing which is the output rectifier for a boost converter (see figure 24) and the primary winding of the transformer for a flyback transformer. the usual design process is: 1. measure the period of the undesired ringing (t 0 ). 2. place a very small ceramic capacitor (about 10 pf) across the output rectifier or primary winding. 3. re-measure the period of the undesired ringing. the new period should be about 3 times that of t 0 . if it is less than this, place a slightly larger value of capacitor across the output rectifier or primary winding. 4. once the desired increase in the ringing period is achieved with a capacitance (c 0 ), place a resistor in series with the capacitor whose value is approximately: r snubber t 0 2 c 0 eqn. (10) this should produce a snubber that does not load the circuit and introduces a very small loss. sl01506 sa57254-xx v batt gnd fb sw v out r passive snubber v dd figure 29. flyback converter with passive snubber.
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 15 laying out the printed circuit board the design of the printed circuit board (pcb) is critical to the proper operation of all switching power supplies. its design affects the supply stability, radio frequency interference behavior and the reliability of the converter. never use the autoroute feature of any pcb design program because this will always produce traces that are too long and too thin. the input and output capacitors are the only source or sink of the high frequency currents found in a switching power supply. all connections to the switching power supply from the outside circuits should be made to the input or output capacitor terminals (+ and ). internally, the layout should adhere to a aone-pointo grounding system, as shown in figure 30. sl01507 v in c in gnd sa57254-xx sw fb v out c out output ground to one point input ground to one point v dd l 0 figure 30. grounding trace for converter. the traces between the input and output capacitors and the inductor, power switch and rectifier(s) should be as short and wide as possible. this reduces the series resistance and inductance that can be introduced by traces. the guidelines for a pcb layout can be summarized as: ? the traces between the input and output capacitor to the inductor, power switch and the rectifier should be made as short and as wide as possible. ? strictly adhere to the one-point wiring practices shown in figure 30. ? on a 2-sided board, do not run sensitive signals traces under the ac voltage node. ? the ic (control) ground is terminated at the output capacitor's negative terminal. designing the pcb for effective heat dissipation the maximum junction temperature is +125 c, which should not be exceeded under any operating conditions. designing a pcb that includes a heatsink system under the device is the key to cooler operation of the circuit, and the longterm reliable operation of the converter. the major sources of heat within the converter are the power switch inside the sa57254-xx, the resistive losses within the inductor, and losses associated with the output rectifier. these losses can be estimated by the following equations: power switch: p d ( sw ) t on i pk 2 r ds ( on ) f sw eqn. (11) inductor: p d ( l 0) i pk 2 r winding eqn. (12) output rectifier: p d ( rect ) i out ( vfwd ) eqn. (13) the thermal resistance (r th(j-a) ) of the sa57254-xx is approximately 220 c/w, assuming the device is soldered to a 2 oz. copper fr4 fiberglass circuit board, and that the minimum footprint was used (copper just under the leads). a rule of thumb in pcb design is that the thermal resistance can be reduced by 30% for each doubling of the copper area close to the device. this effect diminishes for areas greater than five times the minimum pcb footprint. if you take advantage of this rule, thermal resistance can be reduced by using wide copper lands when connecting to the leads of the major power-producing parts. these pcb traces should almost fill the areas surrounding the converter parts to conduct heat away from the device. for demanding applications, additional heat dissipation area can be created by placing a copper island on the opposite side of the pcb from each wide trace and connecting it to the trace with vias (plated thru holes). the junction temperature can be estimated by equation (14). t j ( p d r th ( j-a ) ) t amb ( max ) eqn. (14) where: p d is the power dissipation (w). r th(j-a) is the effective thermal resistance with the additional copper ( c/w). t amb is the highest local expected ambient temperature ( c).
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 16 packing method the sa57254-xx is packed in reels, as shown in figure 31. sl01305 tape detail cover tape carrier tape reel assembly tape guard band barcode label box figure 31. tape and reel packing method.
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 17 plastic small outline package; 5 leads; body width 1.6 mm sop003
philips semiconductors product data sa57254-xx cmos switching regulator (pwm controlled) 2003 nov 11 18 revision history rev date description _2 20031111 product data (9397 750 12317). ecn 853-2272 30331 of 09 september 2003. supersedes data of 2001 aug 01 (9397 750 08875). modifications: ? change package outline version to sop003 in ordering information table and package outline sections. _1 20010801 product data (9397 750 08875). ecn 853-2272 26807 of 01 august 2001. definitions short-form specification e the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed i nformation see the relevant data sheet or data handbook. limiting values definition e limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the l imiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any o ther conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affec t device reliability. application information e applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors ma ke no representation or warranty that such applications will be suitable for the specified use without further testing or modificatio n. disclaimers life support e these products are not designed for use in life support appliances, devices, or systems where malfunction of these products ca n reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applica tions do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes e philips semiconductors reserves the right to make changes in the productseincluding circuits, standard cells, and/or softwaree described or contained herein in order to improve design and/or performance. when the product is in full production (status `production') , relevant changes will be communicated via a customer product/process change notification (cpcn). philips semiconductors assumes no responsibility or liability for th e use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranti es that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. contact information for additional information please visit http://www.semiconductors.philips.com . fax: +31 40 27 24825 for sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com . ? koninklijke philips electronics n.v. 2003 all rights reserved. printed in u.s.a. date of release: 11-03 document order number: 9397 750 12317

data sheet status [1] objective data preliminary data product data product status [2] [3] development qualification production definitions this data sheet contains data from the objective specification for product development. philips semiconductors reserves the right to change the specification in any manner without notice. this data sheet contains data from the preliminary specification. supplementary data will be published at a later date. philips semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. this data sheet contains data from the product specification. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change notification (cpcn). data sheet status [1] please consult the most recently issued data sheet before initiating or completing a design. [2] the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the l atest information is available on the internet at url http://www.semiconductors.philips.com. [3] for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. level i ii iii

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